Ultra-Efficient Nonvolatile Approximate Full-Adder With Spin-Hall-Assisted MTJ Cells for In-Memory Computing Applications
Sepahrad Salavati, Mohammad Hossein Moaiyeri, Kian Jafari
Abstract
Approximate computing aims to reduce the power consumption and design complexity of digital systems with the cost of a tolerable error. In this article, two ultra-efficient magnetic approximate full adders are presented for computing-in-memory applications. The proposed ultra-efficient full adder blocks are coupled with a memory cell based on magnetic tunnel junction (MTJ) to allow for nonvolatility. Therefore, they can be power-gated when required. Both the proposed full adders have simple designs and are energy-efficient. Instead of introducing dedicated write-driver and read circuits, the restorer latch inverters are utilized to contribute to the read and write operations, which results in a lower complexity. The peripheral circuitries are designed based on the gate-all-around carbon nanotube field-effect transistor (GAA-CNTFET). The hardware simulation results show a 5.2 times improvement (78% reduction) in power-delay product (PDP), on average, compared with the previous fully nonvolatile approximate full adders. Utilizing the approximate adders in Gaussian filters to denoise a noisy image revealed that our proposed adders result in almost the same image quality as an accurate adder. Both our adders have an accurate carry output and two erroneous sum outputs. Nevertheless, these two erroneous outputs have a low-value gap, which results in higher quality in image processing applications. The results indicate that the proposed designs make an effective tradeoff between energy and accuracy, which is the main goal of approximate computing.