A Novel Fault-Tolerant Multilevel Inverter With Preserved Output Integrity Under Post-Fault
Miao Zhang, Shaoli Deng, Jianhang Lu, Dali Zheng, Ningrui Yang
Abstract
A novel fault-tolerant multilevel inverter (FT-MLI) with fault output integrity is presented in this article. Source fault tolerance, nine-level output, quadruple boost, and low total standing voltage (TSV) are the key features of the proposed topology. Unlike other FT-MLIs, the proposed FT-MLI can maintain the same level number and magnitude of output voltage in the post-fault condition. The article discusses the operational principles for normal and fault modes, introduces the modulation strategy and capacitance calculation, and outlines the fault tolerance method for the proposed FT-MLI. To optimize for larger capacitor voltage ripple after a fault, a novel pulse width modulation (PWM) is proposed. A comparative study is conducted to evaluate the performance of the proposed topology against other FT-MLIs. Finally, the feasibility of the proposed FT-MLI was verified by simulation and experiment.