Novel Vertical Channel-All-Around(CAA) IGZO FETs for $2\mathrm{T}0\mathrm{C}$ DRAM with High Density beyond 4F2 by Monolithic Stacking
Xinlv Duan, Kailiang Huang, Junxiao Feng, Jiebin Niu, Haibo Qin, Shihui Yin, Guangfan Jiao, Daniele Leonelli, Xiaoxuan Zhao, Weiliang Jing, Zhengbo Wang, Qian Chen, Xichen Chuai, Congyan Lu, Wenwu Wang, Guanhua Yang, Di Geng, Ling Li, Ming Liu
Abstract
For the first time, we propose a stackable vertical Channel-All-Around (CAA) IGZO PETs for high-density 4F <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and long retention 2TOC DRAM application. The device is fabricated in a BEOL-compatible process flow where the channel and gate stack is deposited by Plasma-Enhanced Atomic Layer Deposition (PEALD). The impact of IGZO cycle ratio and plasma power on the device electrical performance are studied. An optimized 50nm-channel-length CAA IGZO FET achieved <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{Ion} > 30\mu \mathrm{A}/\mu \mathrm{m}$</tex> and <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathrm{I}_{\text{off}}$</tex> below <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$1.8\times 10^{-17}\mu \mathrm{A}/\mu \mathrm{m}$</tex> at <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathrm{V}_{\text{DS}}=1\mathrm{V}$</tex> . A long retention of 300s has been experimentally verified for the CAA IGZO 2T0C-bit-cell, making it a potential candidate for low-power 2T0C DRAM with ultralow refresh frequency. Finally, by monolithically stacking the vertical CAA IGZO PETs with 130nm CD to form 2TOC bit cells, we demonstrate the feasibility of the proposed BEOL-compatible 2TOC DRAM for further density scaling beyond 4F2.