Reconfigurable Quasi‐Nonvolatile Memory/Subthermionic FET Functions in Ferroelectric–2D Semiconductor vdW Architectures
Zhongwang Wang, Xiaochi Liu, Xuefan Zhou, Yahua Yuan, Kechao Zhou, Dou Zhang, Hang Luo, Jian Sun
Abstract
Abstract The functional reconfiguration of transistors and memory in homogenous ferroelectric devices offers significant opportunities for implementing the concepts of in‐memory computing and logic‐memory monolithic integration. Thus far, reconfiguration is realized through programmable doping profiles in the semiconductor channel using multiple‐gate operation. This complex device architecture limits further scaling to match the overall chip requirements. Here, reconfigurable memory/transistor functionalities in a ferroelectric‐gated van der Waals transistor by controlling the behavior of ferroelectric oxygen vacancies at the interface are demonstrated. Short‐ and long‐term memory functions are demonstrated by modulating the border oxygen vacancy distribution and the associated charge dynamics. The quasi‐nonvolatile long‐term memory exhibits data retention of over 10 5 s and endurance of up to 5 × 10 5 cycles, verifying its applicability as a potential device platform for neuromorphic networks. More importantly, by modulating the ferroelectricity of the interfacial domains with the interactions of oxygen vacancies, a hysteresis‐free logic transistor is realized with a subthermionic subthreshold swing down to 46 mV dec −1 , which resembles a negative‐capacitance field‐effect transistor. The new concept of achieving functional reconfiguration with prior device performance in a single‐gate ferroelectric field‐effect transistor is of great advantage in future integrated circuit applications.