Vertical C-Shaped-Channel Nanosheet FETs Featured With Precise Control of Both Channel-Thickness and Gate-Length
Zhenfang Xiao, Qiuhong Wang, Huilong Zhu, Z. Chen, Yongkui Zhang, J. J. Li, N. Zhou, Jianfeng Gao, X. Z. Ai, S. S. Lu, Weixing Huang, Wenjuan Xiong, Zhenzhen Kong, Jinjuan Xiang, Yongzheng Zhang, Jianwen Zhao, Junbiao Liu, Yihong Lu, G. B. Bai, Xiaobin He, Anyan Du, Zhenhua Wu, Tao Yang, J. F. Li, Jun Luo, W. W. Wang, Tianchun Ye
Abstract
A novel vertical C-shaped-channel nanosheet field-effect-transistor (VCNFET) featured with precise control of channel-thickness and gate-length, and a unique integration flow of Dual Side Process (DSP) are proposed in this work. The VCNFETs were fabricated by high quality Si/SiGe epitaxy, atomic layer etching with nanometer-scale process control and self-aligned high-k metal gate (HKMG). The integration flow is compatible with mainstream CMOS technology. Thanks to the precise control of channel thickness and doping profiles, perfect SS of 61 mV/dec, small DIBL of 8 mV/V, and remarkably large <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{I}_{\text {on}}/\text {I}_{\text {off}}$ </tex-math></inline-formula> ratio of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${6.28}\times {10}^{{9}}$ </tex-math></inline-formula> were achieved. The device performance and it’s optimization were also investigated with the reduction of the external resistance and numerical simulations.