Low Thermal Budget (<250 °C) Dual-Gate Amorphous Indium Tungsten Oxide (IWO) Thin-Film Transistor for Monolithic 3-D Integration
Wriddhi Chakraborty, Huacheng Ye, Benjamin Grisafe, Ian V. Lightcap, Suman Datta
Abstract
We experimentally demonstrate back-end-of-the-line (BEOL) compatible (<;250 °C thermal budget)1% tungsten (W)-doped amorphous In <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> (IWO) back-gate field-effect transistor (BGFET) and dual-gate field-effect transistor (DGFET) with 7-nm channel thickness. The 100-nm channel length IWO DGFET exhibits excellent subthreshold slope of 73 mV/decade, record I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">D,SAT</sub> of 370 μA/μm, and on-off ratio > 4 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">9</sup> at V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DS</sub> = 1 V and V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">GS</sub> -V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TH</sub> = 2 V. We identify fundamental transport mechanisms that limit electron mobility in amorphous IWO transistors at different gate-bias (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">GS</sub> ) and temperature. Benchmarking reveals that amorphous IWO FETs are promising candidate for in situ transistor fabrication in the BEOL for enabling high-performance monolithic 3-D (M3-D) integrated circuits.