Porting Wire-Grid MoM Framework to Reconfigurable Computing Technology
Tomasz Topa
Abstract
In this letter, a CPU/field-programmable gate array (FPGA) coprocessing implementation of the matrix assembly phase of the method of moments (MoM) is presented. The approach combines the frequency-domain integral equation-based formulation with piecewise-linear (triangular) basis function and method of images to evaluate the radiation pattern of the localizer antenna system. To benefit from the given hardware architecture, the code executed on the device runs only one single work-item OpenCL kernel. Using the Nallatech 385 A device featuring one Intel Arria 10 FPGA, a speedup ratio of about 2.08× is reported when compared to the reference single-core CPU approach, and about 1.11× when compared to the two-core CPU implementation.
Topics & Concepts
Computer scienceField-programmable gate arrayKernel (algebra)PortingParallel computingSpeedupMethod of moments (probability theory)Computational scienceEmbedded systemSoftwareMathematicsCombinatoricsStatisticsProgramming languageEstimatorElectromagnetic Scattering and AnalysisElectromagnetic Compatibility and MeasurementsAntenna Design and Optimization