A 16.5-dBm <i>D</i>-Band Eight-Way Power Amplifier Utilizing Cascaded Transformers in 40-nm Bulk CMOS
Van‐Son Trinh, Jeong-Moon Song, Jung‐Dong Park
Abstract
We present a D-band eight-way power amplifier (PA), which achieves the saturated output power (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$P_{\mathrm {sat}}$ </tex-math></inline-formula>) of 16.5 dBm in 40-nm bulk CMOS. The proposed D-band PA consists of four push-pull PA units with three stages, whose active device sizes are gradually tapered from the output to the input optimal power efficiency. A cascaded transformer-transformer (balun) structure was employed at the output of the PA unit to avoid self-resonance with an improved balun performance at the D-band. The power combiner/splitter is comprised of microstrip transmission lines (MSTLs) to combine the power of the four PA units in the current domain. The fabricated prototype has a chip size of 0.72 mm2 with a core size of 0.46-mm2 excluding pads. The measured PA achieved a power gain of 14.5 dB with the 3-dB gain bandwidth of 18 GHz (121–139 GHz), a peak PAE of 7.2%, and a saturated output power (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$P_{\mathrm {sat}}$ </tex-math></inline-formula>) of 16.5 dBm, which demonstrates the highest output power among the recently reported D-band PAs in bulk CMOS.