Implementation of Five-Level DPWM on Parallel Three-Level Inverters to Reduce Common-Mode Voltage and AC Current Ripples
Weiwei Li, Xueguang Zhang, Zhijia Zhao, Guoqiang Zhang, Gaolin Wang, Dianguo Xu
Abstract
Conventional reduced common-mode voltage discontinuous pulsewidth modulation method for a three-level inverter can reduce the common-mode voltage and switching transitions compared with continuous modulation. However, it suffers from poor output current quality and cannot provide additional performance enhancements when applied directly on parallel three-level inverters. Based on the interactions between the parallel inverters, this article reveals that dual parallel three-level inverters could be analyzed and controlled as a single five-level inverter. Based on this idea, a novel five-level discontinuous modulation method is therefore proposed to further reduce the common-mode voltage of the system by half, in addition to dramatically improving the output current quality compared with conventional three-level method. The specific implementation process is explained in detail, and a unique switching sequence design is developed considering keeping zero average circulating current, which is crucial to the proper function of parallel operation. Furthermore, a neutral point voltage balancing strategy through alternatively applying charging and discharging switching sequences is proposed for the five-level modulation process, which can effectively restore the neutral point balance in case imbalance occurs. The effectiveness and advantages of the proposed method are verified by both simulation and experimental results.