Low-power High-speed Approximate Multiplier Design Using Compression Techniques
Shayanki, C Paramasivam
Topics & Concepts
ModelSimComputer scienceMultiplier (economics)Clock gatingCadenceBooth's multiplication algorithmSpeedupDigital signal processingEfficient energy useAdderElectronic engineeringComputer hardwareField-programmable gate arrayParallel computingClock signalClock skewElectrical engineeringEngineeringVHDLEconomicsMacroeconomicsLatency (audio)JitterTelecommunicationsLow-power high-performance VLSI designAdvancements in Semiconductor Devices and Circuit DesignAnalog and Mixed-Signal Circuit Design