Low–Frequency Noise in Vertically Stacked Si n–Channel Nanosheet FETs
Alberto Vinícius de Oliveira, A. Veloso, Cor Claeys, Naoto Horiguchi, Eddy Simoen
Abstract
This manuscript presents a systematic low-frequency noise analysis of inversion-mode vertically stacked silicon n-channel nanosheet MOSFETs on bulk wafers. Flicker noise due to carrier number fluctuations is shown as the dominant noise source, which is in line with previous reported studies on gate-all-around (GAA) nanowire nMOSFETs. In addition, the benchmark points out that the vertical stacking approach does not deteriorate the oxide trap density, since its normalized input-referred voltage noise Power Spectral Density at flat-band is lower compared to the data on non-stacked horizontal nanowire nMOSFETs. Another finding is that the Coulomb scattering mechanism dominates the mobility.