Enhanced Active Disturbance Rejection Current Controller for Permanent Magnet Synchronous Machines Operated at Low Sampling Time Ratio
Ahmed M. Diab, Seang Shen Yeoh, Serhiy Bozhko, Chris Gerada, Michael Galea
Abstract
Recently, active disturbance rejection control (ADRC) scheme has been widely used for current regulation in ac drive systems owing to its robustness to system uncertainties and its high disturbance-rejection capability. However, it has not been considered as an option for high-speed drives usually operated at limited switching and sampling frequencies. Therefore, this article thoroughly analyzes and discusses the effects of high operating speed, modulation, and computational delays on the conventional ADRC. Based on this analysis, an enhanced ADRC for the current control is proposed to operate the drive system at low sampling time ratio with high robustness to the internal and external disturbances. Effect of model uncertainties on the proposed scheme has also been analytically analyzed and reported. Comprehensive simulation and experimental results have been presented to demonstrate the improved performance of the proposed ADRC scheme and to support the analytical studies.