High-Performance Monolayer WSe2 p/n FETs via Antimony-Platinum Modulated Contact Technology towards 2D CMOS Electronics
Ang‐Sheng Chou, Yu‐Tung Lin, Yuxuan Lin, Ching-Hao Hsu, Ming‐Yang Li, San‐Lin Liew, Sui-An Chou, Hung‐Yu Chen, Hsin‐Yuan Chiu, Po‐Hsun Ho, Ming-Chun Hsu, Yu-Wei Hsu, Ning Yang, Wei-Yen Woon, Szuya Sandy Liao, Duen‐Huei Hou, Chao-Hsin Chien, Wen‐Hao Chang, Iuliana Radu, Chih‐I Wu, H.‐S. Philip Wong, Han Wang
Abstract
Low resistance contact technology for 2D semiconductors is a key bottleneck for the practical application of 2D channel materials at advanced logic nodes. This work presents a novel Sb-Pt modulated contact technology which can alleviate the Fermi-level pinning effect and mediate the band alignment at the metal-2D semiconductor interface, leading to exceptional ohmic contacts for both p-type and n-type WSe <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> FETs (p/n FET). WSe <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> FETs with different Sb/Pt contact compositions, in combination with new oxide-based encapsulation/doping technologies, exhibits record low pFET contact resistance of $0.75 \mathrm{k}\Omega \bullet \mu \mathrm{m}$ among all reported monolayer (1L) 2D pFETs. The nFET contact resistance of $1.8 \mathrm{k}\Omega \bullet \mu \mathrm{m}$ is also the lowest among 1L WSe <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> nFETs. Both 1L WSe <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> pFET and nFET demonstrated remarkable on-state p/n current $\sim 150 \mu \mathrm{A}/ \mu \mathrm{m}$ at $\vert \mathrm{V}_{D} \vert =1\mathrm{V}$, indicating the potential of WSe <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> for CMOS applications. A new version of the semi-automated dry transfer process for chemical vapor deposition (CVD) WSe <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> was also developed utilizing a novel Bi/PMMA/TRT support stack, offering low defect wrinkle-free WSe <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> transfer at wafer-scale.