A Four-Channel Bidirectional <i>D</i>-Band Phased-Array Transceiver for 200 Gb/s 6G Wireless Communications in a 130-nm BiCMOS Technology

Abstract

This article demonstrates a fully integrated broadband four-channel phased array transceiver, capable of wireless data rates up to 200 Gb/s covering the entire <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$D$ </tex-math></inline-formula> -band (110–170 GHz). The circuit is developed in a 130-nm SiGe BiCMOS technology, featuring <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${f}~_{\text {t}}/{f}~_{\text {max}}$ </tex-math></inline-formula> of 300/500 GHz, and includes localized back-side etching-based ON-chip patch antennas. In both transmit and receive modes, direct up- and down-conversions are performed by in-phase and quadrature mixers driven by a multiplier-by-four local oscillator chain. A bidirectional true time delay circuit, with a resolution of 0.446 ps, which is equivalent to the accuracy of a 4-bit phase shifter, provides the squint-free beam-steering capability. Beam-steering measurements show how the beam can be steered from −45° to 45° in a 7° step. The transceiver achieves a 3-dB baseband bandwidth of 30 and 27 GHz in the transmit and receive modes, respectively. A wireless link demonstration is performed by mounting two chips on printed circuit boards, one in the transmit and one in the receive mode, together with plastic lenses on both sides, at a distance of 15 cm. Hardware-in-the-loop measurements show record data rates of 180 Gb/s with EVM of 12.2% using 16-QAM and 200 Gb/s with 8.3% EVM using 32-QAM. The four-channel transceiver consumes 1.95 and 2.5 W in the receive and transmit modes, respectively, which correspond to power efficiencies of 9.75 pJ/bit in the receiver mode and 12.5 pJ/bit in the transmitter mode.

Topics & Concepts