Scaling Solder Micro-Bump Interconnect Down to $10\ \mu\mathrm{m}$ Pitch for Advanced 3D IC Packages
Zhaozhi Li, Yoshihiro TOMITA, Adel Elsherbini, Pilin Liu, Holly A. Sawyer, Johanna Swan, Shawna M. Liff
Abstract
This paper discusses the efforts to shrink the micro-bump pitch to 20 μm and then 10 μm with solder micro-bumps for silicon-on-silicon 3D assembly by leveraging alternate solder diffusion barrier metals and tuning the assembly process to realize both good yield and reliable interconnects. Specifically in this paper, the assembly process challenges are detailed and the impact of our barrier metal assessment and process optimization to resolve these technical challenges are discussed through the study of solder joint reliability results using internal 20 μm pitch and 10 μm pitch solder micro-bump test-vehicles (TV).
Topics & Concepts
SolderingInterconnectionMaterials scienceReliability (semiconductor)SiliconProcess (computing)ScalingThrough-silicon viaElectronic engineeringOptoelectronicsMechanical engineeringComputer scienceEngineeringMetallurgyTelecommunicationsPhysicsOperating systemMathematicsPower (physics)GeometryQuantum mechanics3D IC and TSV technologiesElectronic Packaging and Soldering TechnologiesIntegrated Circuits and Semiconductor Failure Analysis