A Fault-Tolerant Multilevel Inverter Topology With Preserved Output Power and Voltage Levels Under Pre- and Postfault Operation
Anilkumar Chappa, Shubhrata Gupta, Lalit Kumar Sahu, Krishna Kumar Gupta
Abstract
Low reliability is one of the significant worries of a multilevel inverter (MLI) and which results due to the presence of a higher number of switches and capacitors as compared with the conventional two-level inverter. Consequently, the fault-tolerant (FT) operation of MLI has attracted significant research attention. Therefore, in this article, a nine-level inverter topology with FT characteristics is discussed. The proposed topology is capable of tolerating short-circuit and open-circuit faults not only in the single switch but also in multiple switches. It preserves output power, voltage levels, and capacitor voltage balancing under pre- and postfault operation. The proposed MLI topology requires the least number of dc sources, capacitors, switches, clamping diodes, and total blocking voltage in comparison to recently proposed topologies. Thus, offering better efficiency profile under pre- and postfault conditions. The proposed work has been validated experimentally with a laboratory prototype.