Characteristics of Vertical Transistors on a GaN Substrate Fabricated via Na‐Flux Method and Enlargement of the Substrate Surpassing 6 Inches
Masayuki Imanishi, Shigeyoshi Usami, Kosuke Murakami, Kanako Okumura, Kosuke Nakamura, Keisuke Kakinouchi, Yohei Otoki, Tomio Yamashita, Naohiro Tsurumi, Satoshi Tamura, Hiroshi Ohno, Yoshio Okayama, Taku Fujimori, Seiji Nagai, Miki Moriyama, Yusuke Mori
Abstract
The Na‐flux method is expected to be a key GaN growth technique for obtaining ideal bulk GaN crystals. Herein, the structural quality of the latest GaN crystals grown using the Na‐flux method and, for the first time, the characteristics of a vertical transistor fabricated on a GaN substrate grown using this method are discussed. Vertical transistors exhibit normally off operation with a gate voltage threshold exceeding 2 V and a maximum drain current of 3.3 A during the on‐state operation. Additionally, it demonstrates a breakdown voltage exceeding 600 V and a low leakage current during off‐state operation. It is also described that the variation in the on‐resistance can be minimized using GaN substrates with minimal off‐angle variations. This is crucial for achieving the large‐current chips required for future demonstration of actual devices. In addition, the reverse I–V characteristics of the parasitic p–n junction diode (PND) structures indicate a reduction in the number of devices with a significant leakage current compared to commercially available GaN substrates. Finally, a circular GaN substrate with a diameter of 161 mm, surpassing 6 inches, grown using the Na‐flux method is demonstrated, making it the largest GaN substrate aside from those produced through the tiling technique.