112-Gb/s PAM4 ADC-Based SERDES Receiver With Resonant AFE for Long-Reach Channels
Yoel Krupnik, Yevgeny Perelman, Itamar Levin, Yosi Sanhedrai, Roee Eitan, Ahmad Khairi, Yizhak Shifman, Yoni Landau, Udi Virobnik, Noam Dolev, Alon Meisler, Ariel Cohen
Abstract
A 112-Gb/s PAM4 analog-to-digital converter (ADC)-based serializer/de-serializer transceiver (SERDES) receiver is implemented on Intel's 10-nm FinFET process. The receiver consists of a low-noise resonant analog front end (AFE) which provides equalization and gain at 28 GHz, a 64-way time-interleaved ADC, digital equalization consisting of a 16-tap feed-forward equalizer (FFE), and a 1-tap decision-feedback equalizer (DFE), as well as a clock and data recovery (CDR) loop utilizing a 7-GHz digitally controlled oscillator (DCO). Long-reach, -35 dB Nyquist channels are supported by a pre-forward error correction (FEC) bit error rate (BER) of 1e-6, thus making it compatible with existing and projected IEEE Ethernet specifications.