Litcius/Paper detail

Equalization of DC and Surge Components of Drain Current of Two Parallel-Connected SiC MOSFETs Using Single-Input Dual-Output Digital Gate Driver IC

Kohei Horii, Ryuzo Morikawa, Ryunosuke Katada, Katsuhiro Hata, Takayasu Sakurai, Shinichiro Hayashi, Keiji Wãda, Ichiro Omura, Makoto Takamiya

20222022 IEEE Applied Power Electronics Conference and Exposition (APEC)10 citationsDOI

Abstract

A single-input, dual-output (SIDO) digital gate driver (DGD) IC, integrating two 6-bit DGDs, two current sensors, and a controller, is proposed to equalize the drain current (I <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">D</inf> ) variation of two parallel-connected SiC MOSFETs. The DC and surge components of I <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">D</inf> of each MOSFET are equalized by digitally controlling the gate voltage amplitude and the gate current at turn-on, respectively. In the double pulse test at 300 V and 40 A using two parallel SiC MOSFETs with different threshold voltages of 0.5 V, the proposed SIDO DGD IC reduces the differences in the DC and surge components of I <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">D</inf> of the two MOSFETs from 2.6 A to 0.13 A by 95 % and from 1.9 A to 0.32 A by 83 %, respectively. The automatic equalization of the DC components of I <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">D</inf> of the two MOSFETs using SIDO DGD IC is also successfully demonstrated.

Topics & Concepts

SurgeElectrical engineeringMOSFETVoltageEqualization (audio)Dual (grammatical number)Controller (irrigation)Computer sciencePhysicsElectronic engineeringTopology (electrical circuits)EngineeringTransistorBiologyLiteratureAgronomyChannel (broadcasting)ArtSilicon Carbide Semiconductor TechnologiesAdvancements in Semiconductor Devices and Circuit DesignSemiconductor materials and devices