Litcius/Paper detail

Holistic Patterning to Advance Semiconductor Manufacturing in the 2020s and Beyond

Martin van den Brink, Anthony Yen, Paul van Wijnen, Michael J. Lercel, Boudewijn Sluijk

20222022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)12 citationsDOI

Abstract

Semiconductors have enabled ever-increasing efficiency in compute and storage of information, as a result of decades of cost-effective scaling of device density and generations of new device technologies. We believe that continued advances in holistic patterning will enable cost-effective scaling of semiconductor devices to continue throughout the 2020s and beyond. We present here key developments across ASML’s holistic product portfolio: the extreme ultraviolet (EUV) lithography roadmap with its 0.33 numerical-aperture (NA) platform and the next-generation 0.55 NA (High-NA) platform, the deep ultraviolet (DUV) roadmap including cutting-edge immersion lithography and cost-efficient mature systems, and key innovations across our optical metrology, electron-beam metrology and inspection portfolio, and our computational lithographic technology. In high-volume manufacturing, the ultimate lithographic performance is only realized by the holistic combination of exposure systems, metrology and inspection tools, and computational-lithographic algorithms. This includes process window optimization during setup, accurate measurement of process capability, and active control to stay within the patterning process window.

Topics & Concepts

Extreme ultraviolet lithographyLithographyMetrologyProcess windowComputer scienceMultiple patterningImmersion lithographySemiconductor device fabricationKey (lock)Numerical apertureNext-generation lithographyProcess (computing)ResistMaterials scienceNanotechnologyElectron-beam lithographyOptoelectronicsOpticsPhysicsWaferWavelengthOperating systemComputer securityLayer (electronics)Advancements in Photolithography TechniquesIntegrated Circuits and Semiconductor Failure AnalysisAdvancements in Semiconductor Devices and Circuit Design