Broadband Asymmetric GaAs MMIC Doherty Power Amplifiers With Simplified Peaking Matching Network and Output Capacitance Compensation
Weijuan Chen, Yongle Wu, Yana Zheng, Weimin Wang
Abstract
This letter proposes a compact asymmetric Doherty power amplifier (DPA) structure with a simplified peaking matching network (MN), and the output capacitance ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$C_{\mathrm {OUT}}$ </tex-math></inline-formula> ) of the peaking transistor is considered under different power states. The load–pull, including the MNs of carrier and peaking branch, is taken place to demonstrate the suggested scheme. For verification, a monolithic microwave integrated circuit (MMIC) DPA was designed and manufactured using a 0.25- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> GaAs process. The measurement results show that over a wideband of 4.3–6.0 GHz, the saturated output power is 29.4–30.4 dBm with a drain efficiency (DE) of 46.4%–57.1%. At 9-dB power back-off (PBO), the DE is 31%–43%.