A New Fault-Tolerant Multilevel Inverter Structure With Reduced Device Count and Low Total Standing Voltage
Sankar Peddapati, V S Prasadarao K
Abstract
A new fault-tolerant (FT) multilevel inverter (MLI) structure that can tolerate the faults on the switches and sources is introduced in this article. The presence of redundant states in the proposed structure ensures the FT capability, which is an important requirement for emergency loads. Initially, the operation of the proposed FTMLI for fault-free and different fault conditions under symmetric and asymmetric source configurations is discussed. Furthermore, this article explores the ability of the proposed topology operating at different voltage levels in positive and negative half cycles of the output voltage to improve the reliability of the system. For this case, the modified pulsewidth modulation control strategy ensuring minimized lower order harmonics and zero dc offset is presented. The feasibility of the proposed topology is verified through simulation and experimental studies. Lower total standing voltage, reduced switch count, higher efficiency, and improved reliability are the key features of the proposed topology. A comprehensive evaluation and comparative study are performed to evaluate the performance of the proposed MLI over other structures.