Miniaturized, Ultrawideband and Low Insertion Loss <i>Ku</i> -Band GaAs On-Chip Limiter by Improved <i>π</i>-Type Topology With Capacitive Loading
Hao‐Ran Zhu, Jun Wang
Abstract
In this article, a miniaturized, low insertion loss (IL) and ultrabroadband microwave on-chip limiter using improved <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\pi $ </tex-math></inline-formula> -type topology with capacitive loading is presented. In order to reduce the length of the traditional <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\lambda _{g}$ </tex-math></inline-formula> /4 transmission line and the corresponding IL, the OFF-capacitances of the p-i-n diodes are treated as grounded capacitor and are applied to the improved <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\pi $ </tex-math></inline-formula> -type topology. Moreover, open stubs between the second and the third stages can be utilized as capacitive loading for extending the operating frequency bandwidth and miniaturizing the size of the limiter. An on-chip limiter sample is implemented by gallium arsenide (GaAs) p-i-n process and is measured with the IL of less than 0.45 dB from dc-18 GHz, the withstand input power of greater than 40 dBm, and the area of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1.1\times0.7$ </tex-math></inline-formula> mm. Good agreements can be observed between the simulated and measured results.