Pin density technique for congestion estimation and reduction of optimized design during placement and routing
Shaik Karimullah, D. Vishnuvardhan
Topics & Concepts
FloorplanRouting (electronic design automation)Computer scienceVery-large-scale integrationPlacementPhysical designReduction (mathematics)HeuristicMathematical optimizationComputer engineeringCircuit designEmbedded systemMathematicsGeometryArtificial intelligenceVLSI and FPGA Design TechniquesLow-power high-performance VLSI designVLSI and Analog Circuit Testing