ECC-Less Multi-Level SRAM Physically Unclonable Function and 127% PUF-to-Memory Capacity Ratio with No Bitcell Modification in 28nm
Joydeep Basu, Sachin Taneja, Viveka Konandur Rajanna, Tianqi Wang, Massimo Alioto
Abstract
A multi-level (2 bits/bitcell) SRAM PUF is introduced to uniquely enable ECC-less operation with PUF capacity exceeding storage capacity at no cell modification. The first PUF bit is generated from steady-state post-reset bitcell value with > 4X higher stability than conventional power-up. The second is simultaneously extracted from the transient response. Above-storage capacity and improved stability eliminate ECC down to the SRAM $V_{min}(0.6V)$ at 75-fJ/bit energy and 3.3% area overhead in 28 nm.
Topics & Concepts
Static random-access memoryReset (finance)Physical unclonable functionOverhead (engineering)Power (physics)Computer scienceElectronic engineeringEmbedded systemComputer hardwareEngineeringElectrical engineeringPhysicsEconomicsFinancial economicsArbiterQuantum mechanicsPhysical Unclonable Functions (PUFs) and Hardware SecurityIntegrated Circuits and Semiconductor Failure AnalysisAdvancements in Semiconductor Devices and Circuit Design