Stop-and-Go Gate Drive Minimizing Test Cost to Find Optimum Gate Driving Vectors in Digital Gate Drivers
Toru Sai, Koutaro Miyazaki, Hidemine Obara, Tomoyuki Mannen, Keiji Wãda, Ichiro Omura, Takayasu Sakurai, Makoto Takamiya
Abstract
An active gate driving is effective to solve the trade-off between the switching loss and the current/voltage overshoot of power transistors. The test cost in the conventional digital gate drivers with four variables, however, is high, because more than 2000 measurements are required to find an optimum gate driving vector out of 64 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sup> (~1.7 x 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">7</sup> ) combinations [1]. To minimize the test cost, a stop-and-go gate drive with only one variable is proposed. The switching loss and the current/voltage overshoot in turn-on/off state of IGBT of the conventional gate drive [1] and the proposed stop-and-go gate drive are measured by using a 6-bit programmable digital gate driver IC across nine conditions including different load currents (20 A, 50 A, and 80 A) and temperatures (25 °C, 75 °C, and 125 °C), and they are compared. The performance degradation of the switching loss and the current/voltage overshoot in the proposed stop-and-go gate drive over the conventional gate drive with four variables [1] is less than 8 % and 25 % across the nine conditions in turn-on/off state respectively.