Enhancing network-on-chip performance by 32-bit RISC processor based on power and area efficiency
D.V. Soundari, M.K. Shanker Ganesh, Indira M. Raman, R. Karthick
Topics & Concepts
Computer scienceSIMDReduced instruction set computingFloating pointClock rateInstructions per cycleEmbedded systemComputer hardware32-bitParallel computingUpgradeInstruction setChipOperating systemCentral processing unitTelecommunicationsParallel Computing and Optimization TechniquesSecurity and Verification in ComputingRadiation Effects in Electronics