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A Dynamically Reconfigurable ECG Analog Front-End With a 2.5× Data-Dependent Power Reduction

Somok Mondal, Chung-Lun Hsu, Roozbeh Jafari, Drew A. Hall

2021IEEE Transactions on Biomedical Circuits and Systems23 citationsDOI

Abstract

This paper presents a reconfigurable electrocardiogram (ECG) analog front-end (AFE) exploiting bio-signals' inherent low activity and quasi-periodicity to reduce power consumption. This is realized by an agile, on-the-fly dynamic noise-power trade-off performed over specific cardiac cycle regions guided by a least mean squares (LMS)-based adaptive predictor leading to ∼2.5× data-dependent power savings. Implemented in 65 nm CMOS, the AFE has tunable performance exhibiting an input-referred noise ranging from 2.38 – 3.64 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\mu {V_{{\rm{rms}}}}$</tex-math></inline-formula> while consuming 307 – 769 nW from a 0.8 V supply. A comprehensive system performance verification was performed using ECG records from standard databases to establish the feasibility of the proposed predictor-based approach for power savings without compromising the system's anomaly detection capability or ability to extract pristine ECG features.

Topics & Concepts

Front and back endsAnalog front-endReduction (mathematics)Power (physics)Electronic engineeringData reductionComputer scienceElectrical engineeringMaterials scienceCMOSEngineeringPhysicsMathematicsOperating systemData miningGeometryQuantum mechanicsAnalog and Mixed-Signal Circuit DesignECG Monitoring and AnalysisLow-power high-performance VLSI design
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