A Cellular Automata Guided Finite-State-Machine Watermarking Strategy for IP Protection of Sequential Circuits
Rajit Karmakar, Suman Sekhar Jana, Santanu Chattopadhyay
Abstract
Preventing the illegal use of Intellectual Property (IP) cores has been one of the most fundamental challenges for the semiconductor industry. Hardware watermarking is a viable and widely adopted solution to this problem, which can detect IP piracy by verifying the authorship proof of the design. Easy detectability and resilience against various attacks are the two most fundamental criteria of a robust watermarking scheme. However, despite offering significant protection against numerous attacks, field authentication of watermark has been a substantial problem for the state-of-the-art Finite State Machine (FSM) watermarking schemes. In this article, we address this problem by proposing a novel Cellular Automata (CA) guided FSM watermarking strategy, which offers easy in-field authentication, without compromising on the security of the design. Self-testability feature and unique state-transition property of a special class of CA ( <inline-formula><tex-math notation="LaTeX">$D1*CA$</tex-math></inline-formula> ), and its dual counterpart ( <inline-formula><tex-math notation="LaTeX">$D1*CA_{dual}$</tex-math></inline-formula> ) is the backbone of the proposed FSM watermarking scheme. Unlike the existing FSM watermarking strategies, watermarking in the proposed technique neither depends on the existence of the free state-transitions nor requires pseudo-inputs. Experimental results show that although the design overheads of CA-based FSM designs are relatively high, the additional overheads of the proposed watermarking scheme is minimal. Unlike the existing techniques, the overhead of the proposed strategy is independent of the watermark length, which enables embedding a significantly large authorship signature into the IP.