An Advanced Computing Architecture for Binary to Thermometer Decoder using 18nm FinFET
Rajeev Ratna Vallabhuni, J. Sravana, M. Saikumar, Manepalli Sriharsha, D.Roja Rani
Abstract
In this paper, a decoder is designed to convert the binary data to thermometer code. This paper involves a 4-bit decoder such that it consists of 4 inputs and 15 outputs. This decoder is designed in two different ways; IG-LP mode decoder and multiplexer based decoder. The IG-LP mode decoder is designed using the truth table of binary to thermometer decode r. This logic based decoder consists of 15 different logics, which are developed using the FinFET technology. The multiplexer based decoder is designed using 2:1 multiplexer circuits. These 2:1 multiplexers are also designed using FinFET technology. FinFET 18nm spectre models are used in cadence to design and simulations of proposed circuits. The performance validation has done with respect to power consumption, delay, PDP and EDP of both the designs.