Study of Silicon Nitride Inner Spacer Formation in Process of Gate-all-around Nano-Transistors
Junjie Li, Junjie Li, Yongliang Li, N. Zhou, Wenjuan Xiong, Guilei Wang, Qingzhu Zhang, Anyan Du, Jianfeng Gao, Zhenzhen Kong, Hongxiao Lin, Jinjuan Xiang, Chen Li, Xiaogen Yin, Xiaolei Wang, Hong Yang, Xueli Ma, Jianghao Han, Jing Zhang, Tairan Hu, Zhe Cao, Tao Yang, Junfeng Li, Junfeng Li, Huaxiang Yin, Huilong Zhu, Jun Luo, Wenwu Wang, Henry H. Radamson
Abstract
Stacked SiGe/Si structures are widely used as the units for gate-all-around nanowire transistors (GAA NWTs) which are a promising candidate beyond fin field effective transistors (FinFETs) technologies in near future. These structures deal with a several challenges brought by the shrinking of device dimensions. The preparation of inner spacers is one of the most critical processes for GAA nano-scale transistors. This study focuses on two key processes: inner spacer film conformal deposition and accurate etching. The results show that low pressure chemical vapor deposition (LPCVD) silicon nitride has a good film filling effect; a precise and controllable silicon nitride inner spacer structure is prepared by using an inductively coupled plasma (ICP) tool and a new gas mixtures of CH2F2/CH4/O2/Ar. Silicon nitride inner spacer etch has a high etch selectivity ratio, exceeding 100:1 to Si and more than 30:1 to SiO2. High anisotropy with an excellent vertical/lateral etch ratio exceeding 80:1 is successfully demonstrated. It also provides a solution to the key process challenges of nano-transistors beyond 5 nm node.