Comparison of 32-bit ALU for Reversible Logic and Irreversible Logic
S. Nagaraj, B.Vamsi Krishna, Botta Chakradhar, Debanjan Sarkar
Abstract
Semiconductor devices has been undergoing large improvement in terms of performance, speed of the device because of large scaling of devices, simultaneously the power dissipation has been one of the major concern. As the scaling of device has been reached its limits the break through could be the emerging technology i.e., Reversible computing in VLSI industry. As this technology has zero power dissipation, this is a major advantage in the reversible logic circuits. The ALU is major component in the system and it is used in the applications such as computers, mobiles, and calculators. The 32 Bit arithmetic logic unit is designed using Verilog Hardware Description Language with operations such as AND logic, OR logic, FullAdder using One bit ALU. The reversible ALU can work fast as compared with irreversible ALU. Reversible logic gates decreases power dissipation, delay and area. So reversible gates are used in VLSI design techniques. This paper presents an ALU designed of reversible logic gates using Toffoli, Fredkin, and Peres Gate which replaces the AND and OR gate for each one bit ALU. All the logics are performed using the softwares Modelsim Altera 6.3g and the synthesis using Xilinx ISE 14.7. The designed ALU using reversible logic reduces the area about 34% and delay about 48.91%.