Litcius/Paper detail

Design and verification of silicon bridge in 2.5D advanced package based on universal chiplet interconnect express (UCIe)

Yuxuan Fan, Yunyan Zhou, Qidong Wang, Bo Lei, Gang Song, Wenwen Zhang, Hanchen Gan

2025Microelectronics Reliability7 citationsDOI

Topics & Concepts

InterconnectionBridge (graph theory)Package designEngineeringElectronic engineeringComputer scienceElectrical engineeringEmbedded systemComputer architectureSystems engineeringTelecommunicationsInternal medicineMedicine3D IC and TSV technologiesInterconnection Networks and SystemsVLSI and Analog Circuit Testing