Litcius/Paper detail

Experimental Demonstration of High-order In-memory Computing based on IGZO Charge Trapping RAM Array for Polynomial Regression Acceleration

Lin Bao, Zongwei Wang, Yuhao Shi, Yaotian Ling, Yunfan Yang, Linbo Shan, Shengyu Bao Sin, Cuimei Wang, Qilin Zheng, Junghwan Kim, Hideo Hosono, Yimao Cai, Ru Huang

20222022 International Electron Devices Meeting (IEDM)10 citationsDOI

Abstract

We demonstrate for the first time a novel IGZO- based CT-RAM that can accomplish ternary computation by utilizing the inherent non-linear dynamics. Excellent analog transconductance modulation $(\gt 64$ levels) enables both first-order linear (constant $V_{\text{g}}$) and second-order quadratic (variable $V_{\text{g}}$) drain responses by exploiting the volatile charge trapping/de-trapping of the gate-channel interface. A complementary CT-RAM array is proposed and experimentally demonstrated to implement a polynomial regression (PR) computation engine with reduced hardware overhead. Further, the PR engine based on CT-RAM array demonstrates 95.67% accuracy in classification and 33.7% improvement of goodness-of-fit in regression analysis. More importantly, PR computation allows interpretations of model parameters, which are indispensable in various medical domains for diagnosis and prognostic. This is the first demonstration of white-box PR computation hardware based on dedicated emerging devices.

Topics & Concepts

ComputationComputer scienceTernary operationOverhead (engineering)AccelerationAlgorithmTransconductancePolynomialTrappingParallel computingComputational scienceTopology (electrical circuits)Computer hardwareMathematicsPhysicsElectrical engineeringVoltageEngineeringTransistorMathematical analysisClassical mechanicsProgramming languageBiologyOperating systemEcologyAdvanced Memory and Neural ComputingFerroelectric and Negative Capacitance DevicesNeural dynamics and brain function