31.1 An 83.4%-Peak-Efficiency Envelope-Tracking Supply Modulator Using a Class-G Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output Converter for 200MHz Bandwidth 5G New Radio RF Applications
Changjin Chen, Ximing Li, Rui Hu, Lin Cheng
Abstract
Envelope tracking (ET) significantly improves the efficiency of RF power amplifiers (PAs) in mobile handsets. Most ET supply modulators (ETSMs) adopt a hybrid topology, combining a wide-bandwidth low-efficiency linear amplifier (LA) to handle high-frequency power, and a high-efficiency switching amplifier (SA) that is responsible for low-frequency power, as shown in Fig. 31.1.1. However, as the 5G new radio (NR) standard progresses, ETSM design confronts challenges arising from wide signal bandwidth (200/300MHz), large PA decoupling capacitor (several hundreds of pF) and increased voltage rating (>5V) [1, 2]. The sourcing or sinking current of the decoupling capacitor contributes a considerable portion of the output current when tracking high-frequency high-AC-swing envelope signals, and a large bias current is also required to push the LA output pole to a higher frequency. These currents multiplied by their voltage drop on the LA account for the primary loss in the ETSM, severely compromising system efficiency. To reduce the sourcing and sinking currents, several approaches have been introduced, including the use of a fast buck converter [3], a 3-level buck converter with hysteretic control [4], and an energy-recycling technique [5]. However, inherent limitations related to current sensing speed and circuit delays make them hardly applicable as the bandwidth approaches 200MHz. Additionally, the frequent switching of high-voltage power devices in SA also introduces significant switching loss, degrading overall efficiency. While the digital ET proposed in [1] achieves notable efficiency, it is essentially an enhanced version of average power tracking (APT), leading to a poor PA efficiency. In this study, instead of reducing the LA current, we introduce a class-G LA powered by a single-inductor dual-input-dual-output (SIDIDO) DC-DC converter, aimed at minimizing the voltage drop across LA and thus reducing its loss. Fabricated in a 65nm CMOS, the proposed ETSM achieves 200MHz bandwidth, a peak efficiency of 83.4%, and an envelope range of 1V to 5V for a 5Ω‖200pF load.