A modular Vedic multiplier architecture for model-based design and deployment on FPGA platforms
Valentina Bianchi, Ilaria De Munari
Topics & Concepts
Computer scienceField-programmable gate arrayVHDLModular designMultiplier (economics)AdderComputer hardwareEmbedded systemArchitectureComputer architectureLatency (audio)Operating systemMacroeconomicsVisual artsTelecommunicationsEconomicsArtLow-power high-performance VLSI designEmbedded Systems Design TechniquesVLSI and FPGA Design Techniques