A 16.1-bit Resolution 0.064-mm<sup>2</sup> Compact Highly Digital Closed-Loop Single-VCO-Based 1-1 Sturdy-MASH Resistance-to-Digital Converter With High Robustness in 180-nm CMOS
Elisa Sacco, Johan Vergauwen, Georges Gielen
Abstract
A novel direct resistive-sensor-to-digital readout circuit is presented, which achieves 16.1-bit ENOB while being very compact and robust. The highly digital time-based architecture employs a single voltage-controlled oscillator (VCO), counter, and digital feedback loop for the readout of an external single-ended highly nonlinear resistive sensor, such as an NTC thermistor. In addition to the inherent first-order noise shaping due to the oscillator, the second loop in SMASH configuration creates second-order noise shaping. Fabricated in 180-nm CMOS, the readout circuit achieves 16.1 bit of resolution for 1-ms conversion time and consumes only 171 μW, resulting in an excellent 2.4-pJ/c.s. FOMW for a resistive sensor interface while occupying only 0.064 mm2. The specific closed-loop architecture tackles the VCO nonlinearity, achieving more than 14 bits of linearity. Multiple prototype chip samples have been measured in a temperature-controlled environment from -40 °C to 125 °C for the readout of commercial external NTC thermistors. A maximum temperature inaccuracy of 0.3 °C is achieved with only one-point trimming at room temperature. Since the circuit architecture decouples the sensor excitation from the feedback, high electromagnetic interference (EMI) immunity at the sensor node is demonstrated as well.