A 56GHz Receiver Analog Front End for 224Gb/s PAM-4 SerDes in 10nm CMOS
Shiva Kiran, Ajay Balankutty, Yutao Liu, Rajeev Dokania, Hariprasath Venkataraman, Priya Wali, Stephen Kim, Yoel Krupnik, Ariel Cohen, Frank O’Mahony
Abstract
A receiver analog front end (AFE) suitable for a 224 Gb/s PAM-4 long-reach ADC-based SerDes receiver is implemented in Intel 10nm FinFET process. The AFE consists of distributed input matching network and a hybrid peaking CTLE followed by a VGA that drives an interleaved ADC used for characterization. The AFE achieves 19dB boost and 11.7dB peak gain at 54GHz while consuming 60mW.
Topics & Concepts
Video Graphics ArraySerDesAnalog front-endCMOSFront and back endsComputer scienceElectronic engineeringElectrical engineeringEngineeringComputer hardwareOperating systemPhotonic and Optical DevicesAdvancements in PLL and VCO TechnologiesAnalog and Mixed-Signal Circuit Design