Cycle PUF: A Cycle operator based PUF in Carbon Nanotube FET Technology
B. Srinivasu, Anupam Chattopadhyay
Abstract
This paper proposes a ternary cycle operator-based PUF in CNFET technology. The PUF is designed using ternary unary operators and mainly uses cycle operators in the ternary logic, hence named as cycle PUF. The proposed PUF is a delay based design using cycle operators <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$A^{1}$</tex> and <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$A^{2}$</tex> . These operators with their intrinsic addition capability, they provide better randomness. A delay line is designed using cycle operators <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$A^{1}$</tex> and <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$A^{2}$</tex> . The delay line provides random delay at the output through process variations of the CNT. Monte-Carlo simulations reveal that the proposed PUF is generating 51.2% of 0's and 48.7% of 1's.