Physics-Based Strategies for Fast TDDB Testing and Lifetime Estimation in SiC Power MOSFETs
Oriol Aviñó-Salvadó, Cyril Buttay, Ferran Bonet, Christophe Raynaud, Pascal Bevilacqua, J. Rebollo, Hervé Morel, X. Perpiñà
Abstract
To expedite testing, Time-Dependent Dielectric Breakdown (TDDB) analyses are conducted on commercial 4H-SiC MOSFETs at high gate-to-source voltages ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\bm {V_{GS}}$</tex-math></inline-formula> ), under Fowler-Nordheim conduction only. However, as inferred, such conditions induce impact ionization-generated holes in the dielectric layer (SiO <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\bm {_{2}}$</tex-math></inline-formula> ), resulting in a state transition in the effective dipolar moment. This accelerates the SiO <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\bm {_{2}}$</tex-math></inline-formula> degradation leading to an overestimation of its intrinsic lifetime at typical <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$V_{GS}$</tex-math></inline-formula> values for gate driving in power converters. To address this, a physics-based approach is proposed to design TDDB tests under such conditions and to correct the intrinsic lifetime prediction at nominal <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\bm {V_{GS}}$</tex-math></inline-formula> values, shortening the testing time by up to 2 orders of magnitude. Thus, the proposed method is a well-suited candidate to be considered in SiC power device qualification standards, still under development.