1.2-kV Planar SiC MOSFETs With Improved Short-Circuit Capability by Adding Plasma Spreading Layer
Chaobiao Lin, Na Ren, Hongyi Xu, Li Liu, Zhengyun Zhu, Kuang Sheng
Abstract
In this article, a structure design concept plasma spreading layer (PSL) has been introduced into planar silicon carbide (SiC) MOSFETs. Devices’ static characteristics, gate–drain capacitance ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${C}_{\text {gd}}{)}$ </tex-math></inline-formula> , and short-circuit (SC) robustness are studied with experiments. The PSL structure can increase the breakdown voltage (BV) and reduce <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${C}_{\text {gd}}$ </tex-math></inline-formula> of the devices. The MOSFETs with the PSL exhibit an 11.6% higher Baliga’s figure of merit (BFOM) and a 75% higher 1/high-frequency figures-of-merit (HF-FOM). Moreover, they have better SC robustness by 60%, 67%, and 33% under 400-, 600-, and 800-V dc bus voltage than that of the traditional one. Combined with the experimental data and the 3-D simulation results, the MOSFETs with the PSL have enhanced JFET effects, which reduces the electric potential, SC current density, and electric field in the JFET region during the SC process, so as to enhance the SC robustness. The SC failure mechanisms are studied with emission microscope (EMMI) analysis, focused ion beam (FIB) observation, and simulations.