A 15.5-ENOB 335 mV<sub>PP</sub>-Linear-Input-Range 4.7-GΩ-Input-Impedance CT-ΔΣM Analog Front-End With Embedded Low-Frequency Chopping

Yijie Li, Weiqi Zhi, Yuying Li, Jianhong Zhou, Zhiliang Hong, Jiawei Xu

2023IEEE Solid-State Circuits Letters15 citationsDOI

Abstract

This article presents a second-order continuous-time delta-sigma (CT-ΔΣ) based AFE for biopotential sensor interfaces. High linearity is achieved by using a current balanced Gm,1 input stage with gain-boosting and cascode techniques. Low-frequency chopping embedded in gain-boosting OTAs breaks the limitation of chopping frequency in conventional CT-ΔΣ ADCs and mitigates flicker noise without reducing the input impedance. In the second stage, the closedloop Gm,2-OTA-C proportional integrator (PI) relaxes the linearity requirements of the OTA and eliminates the additional active adder. Fabricated in a standard 0.18-μm CMOS technology, this directdigitization AFE achieves 94.9dB peak SNDR, 335mVpp linear input range, and 4.7GΩ input impedance at 50Hz with 64× reduction in the chopping frequency.

Topics & Concepts

CMOSIntegratorLinearityCascodeElectrical impedanceElectronic engineeringOutput impedanceAnalog front-endEffective number of bitsElectrical engineeringMaterials scienceEngineeringAmplifierVoltageAnalog and Mixed-Signal Circuit DesignCCD and CMOS Imaging SensorsAdvancements in Semiconductor Devices and Circuit Design