Litcius/Paper detail

Leveraging Prior Knowledge for Effective Design-Space Exploration in High-Level Synthesis

Lorenzo Ferretti, Jihye Kwon, Giovanni Ansaloni, Giuseppe Di Guglielmo, Luca P. Carloni, Laura Pozzi

2020IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems42 citationsDOI

Abstract

High-Level Synthesis (HLS) tools allow the generation of a large variety of hardware implementations from the same specification by setting different optimization directives. Each combination of HLS directives returns an implementation of the target application that is based on a particular microarchitecture. Designers are interested only in the subset of implementations that correspond to Pareto-optimal points in the performance versus cost design space. Finding this subset is hard because the relationship between the HLS directives and the Pareto-optimal implementations cannot be foreseen. Hence, designers must default to an exploration of the design space through many time-consuming HLS runs. We present a methodology that infers knowledge from past design explorations to identify high-quality directives for new target applications. To this end, we formulate a novel abstract representation of applications and their associated configuration spaces, introduce a similarity metric to compare quantitatively the configuration spaces of different applications, and a method to infer actionable information from a source space to a target space. The experimental results with the MachSuite benchmarks show that our approach retrieves close approximations of the Pareto frontier of best-performing implementations for the target application, in exchange for a small number of HLS runs.

Topics & Concepts

ImplementationDesign space explorationComputer scienceMetric (unit)Pareto principleRepresentation (politics)Variety (cybernetics)High-level synthesisSpace (punctuation)Similarity (geometry)Pareto optimalComputer engineeringComputer architectureTheoretical computer scienceMulti-objective optimizationField-programmable gate arrayEmbedded systemProgramming languageMathematical optimizationMachine learningArtificial intelligenceMathematicsEngineeringPoliticsOperating systemImage (mathematics)Operations managementLawPolitical scienceParallel Computing and Optimization TechniquesFerroelectric and Negative Capacitance DevicesAdvancements in Semiconductor Devices and Circuit Design