Robust, Efficient Distributed Power Amplifier Achieving 96 Gbit/s With 10 dBm Average Output Power and 3.7% PAE in 22-nm FD-SOI
Umut Celik, Patrick Reynaert
Abstract
A pseudo-differential distributed power amplifier (DPA) based on complementary gain stages is presented for wideband femtocell 5G indoor communications in 22-nm fully depleted silicon-on-insulator (FD-SOI) technology. Capacitive equalization is used to achieve flat bandwidth over the desired frequency range. Due to the complementary gain stages, no expensive bias-Ts are required. In order to improve reverse isolation and increase the output power, stacking is utilized. The design uses back-biasing to set the drain voltages of the DPA instead of the sensitive gate biases. The differences in the design process between a distributed amplifier (DA) and a DPA are presented. Tradeoffs between gain-bandwidth (GBW), reliability, peak power-added efficiency (PAE), output power, and amplitude-to-phase (AMPM) linearity are explored. The DPA achieves an 11.6-dB gain, a 0.4-31.6 GHz 3-dB small-signal bandwidth, and a 16.4 dBm peak-saturated output power ($P_{\text {SAT}}$ ) with a 17.2% PAE from the 2.5-V supply. AMPM distortion at output-referred 1-dB compression point (OP 1 dB) and at $P_{\text {SAT}}$ is less than 2°/5° up to the 31 GHz, respectively. It achieves 10 dBm average output power reaching 80/96 gigabit per second (Gbit/s) at 17 GHz with 16/64 QAM modulation. At 28 GHz, it achieves 6.4/4.5 dBm output power with 12/8-Gbit/s data rate with 64/256 QAM modulation.