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Design and Power Dissipation Consideration of PFAL CMOS V/S Conventional CMOS Based 2:1 Multiplexer and Full Adder

Manvinder Sharma, Digvijay Pandey, Pankaj Palta, Binay Kumar Pandey

2021Silicon54 citationsDOI

Topics & Concepts

CMOSMultiplexerAdiabatic circuitAdderElectronic circuitDissipationElectrical engineeringElectronic engineeringDigital electronicsIntegrated injection logicComputer scienceTransistorPass transistor logicEngineeringMultiplexingPhysicsVoltageThermodynamicsLow-power high-performance VLSI designQuantum-Dot Cellular AutomataAnalog and Mixed-Signal Circuit Design
Design and Power Dissipation Consideration of PFAL CMOS V/S Conventional CMOS Based 2:1 Multiplexer and Full Adder | Litcius