Challenges and solutions for post-CMP cleaning at device and interconnect levels
Jihoon Seo
Topics & Concepts
WaferInterconnectionNanotechnologyMaterials scienceProcess engineeringComputer scienceEngineering physicsEngineeringTelecommunicationsAdvanced Surface Polishing TechniquesIntegrated Circuits and Semiconductor Failure AnalysisSemiconductor materials and devices