A monolithic InP/SOI platform for integrated photonics
Zhao Yan, Yu Han, Liying Lin, Ying Xue, Chao Ma, Wai Kit Ng, Kam Sing Wong, Kei May Lau
Abstract
The deployment of photonic integrated circuits (PICs) necessitates an integration platform that is scalable, high-throughput, cost-effective, and power-efficient. Here we present a monolithic InP on SOI platform to synergize the advantages of two mainstream photonic integration platforms: Si photonics and InP photonics. This monolithic InP/SOI platform is realized through the selective growth of both InP sub-micron wires and large dimension InP membranes on industry-standard (001)-oriented silicon-on-insulator (SOI) wafers. The epitaxial InP is in-plane, dislocation-free, site-controlled, intimately positioned with the Si device layer, and placed right on top of the buried oxide layer to form "InP-on-insulator". These attributes allow for the realization of various photonic functionalities using the epitaxial InP, with efficient light interfacing between the III-V devices and the Si-based waveguides. We exemplify the potential of this InP/SOI platform for integrated photonics through the demonstration of lasers with different cavity designs including subwavelength wires, square cavities, and micro-disks. Our results here mark a critical step forward towards fully-integrated Si-based PICs.