An Integrated Driver With Bang-Bang Dead-Time Control and Charge Sharing Bootstrap Circuit for GaN Synchronous Buck Converter
Ching‐Jan Chen, Pin-Ying Wang, Sheng-Teng Li, Yen‐Ming Chen, Yu-Cheng Chang
Abstract
This article proposes a high-frequency integrated gate driver for gallium nitride (GaN) synchronous buck converter. The proposed adaptive bang-bang dead-time control minimizes dead-time at any load condition. Thus, it mitigates the excessive power loss caused by GaN device reverse conduction in high-frequency applications. The proposed charge sharing bootstrap circuit ensures sufficient gate overdrive voltage with reduced chip area. Fabricated in a TSMC 0.25- <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">μ</i> m BCD process, the driver integrated circuit enabled GaN-based buck converter to operate at 10 MHz switching frequency with minimal dead-time to as low as 0.4 ns under light load and heavy load conditions. Compared with fixed dead-time control, the proposed work improves around 5% efficiency under heavy load condition. The fully integrated bootstrap circuit with 100 and 60 pF (HV) capacitor obtained the lower than 0.6 V driving voltage drop with only 45% capacitance and around half of the voltage drop compared with a conventional bootstrap circuit. Besides, the proposed driver successfully tackled the parasitic ringing and dead-time overcharging issues in the GaN converter.