A 14.2 mW 29-39.3-GHz Two-Stage PLL with a Current-Reuse Coupled Mixer Phase Detector
Yuan Liang, Chirn Chye Boon, Qian Chen
Abstract
A Ka-band millimeter wave (mmW) integer-N phase-locked loop (PLL) exploiting a novel current-reuse coupled mixer (CRCM) phase detector (PD) is proposed. Aiming to attenuate the reference spurs in the PLL, the CRCM PD is realized by a pair of coupled mixers folded to each other, achieving mutual spur compensation without consuming extra power or narrowing the PLL loop bandwidth. A mmW signal source is constructed by a two-stage PLL followed by a frequency tripler. Realized in a 28 nm CMOS process, the signal source attains a locking range of 29-39.3-GHz, maximum reference spur of −73.7 dBc, and 160.6 fs <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">rms</inf> integrated jitter (integrated from 1 k to 100 MHz). It consumes 14.2 mW power and occupies an active area of only 0.1 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , achieving a figure of merit (FoM) of −244.4 dB when using a 150-MHz reference.