Advanced 2.5D and 3D packaging technologies for next generation Silicon Photonics in high performance networking applications
Sandeep Razdan, Peter De Dobbelaere, Jie Xue, Aparna Prasad, Vipul Patel
Abstract
We will discuss packaging solutions & assembly processes developed for next generation silicon photonics systems ranging from 100G to 800G, with a scalable path toward 1.6T & co-packaged optics. Focus will be on new device integration schemes, packaging architectures, and assembly processes geared toward high performance, high reliability networking applications. We will elaborate on these challenges & discuss various packaging innovations which, if optimized for application to photonics systems, can help scale next generation of silicon photonics devices and resolve critical issues toward increasing number of channels, data rate, & reduce power and cost per bit for future optics products, providing a path to co-packaged optics.